Linux Plumbers Conference 2022

Session

RISC-V MC

Sep 13, 2022, 3:00 PM

"Meeting 1&2" (Clayton Hotel on Burlington Road)

Presentation materials

RISC-C MC Introduction.pdf

RISC-V MC Introduction

327. Intro

ATISH PATRA (Rivos), Palmer Dabbelt (Google)

9/13/22, 3:00 PM

79. The Odyssey of HWCAP on RISC-V platforms

"Ruinland" ChuanTzu Tsai (SiFive)

9/13/22, 3:05 PM

It's always been challenging for operating systems to tell the (userspace) programs about the underlying hardware capabilities on RISC-V platforms.

For most computer architectures, a bit vector may suffice since the 64 bit platforms are most likely the enhancement of their 32 bit predecessors.

Yet sadly that's more than complicated for RISC-V, which has a much more diverse...

141. RISC-V ACPI and UEFI Updates

Sunil V L

9/13/22, 3:40 PM

To support server class Operating Systems, ACPI needs to be supported on RISC-V. We had discussed what it takes to enable basic ACPI support for RISC-V in last year's LPC. In this session, we discuss the progress we made on
1) ACPI specification ECRs
2) Linux/Qemu patches required to support basic ACPI
3) RISCV_EFI_BOOT_PROTOCOL support required to enable ACPI
4) New RIMT proposal for RISC-V IOMMU

41. What to do with kconfig.socs?

Conor Dooley

9/13/22, 4:10 PM

The goal of kconfig.socs originally was to have SOC_FOO symbols so that a user "can just push a button and have everything they need to boot", which was implemented via selects. This sort of behaviour for a kconfig symbol is at odds to other architectures and not maintainable in the long term as the number of SoCs grows and/or the select dependencies change.

As things stand, different...

64. Confidential Computing for RISC-V-based Platforms

RAVI SAHITA (Rivos)

9/13/22, 5:00 PM

Confidential computing aims to protect data in use on computing platforms. Via confidential computing mechanisms, we aim to remove host software (OS/VMM, service VMs and firmware), other tenants (VMs), host software developers, operators and administrators of multi-tenant systems from the Trusted Computing Base (TCB) of tenant workloads. For RISC-V-based platforms, we propose an Application...

147. Tuning in-kernel routines on RISC-V

Mr Heiko Stuebner (Vrull)

9/13/22, 5:30 PM

The kernel comes with its own implementation of common routines of the C libraries (memcpy, memcmp, strcmp, etc.). Since the kernel already has a rich infrastructure to handle architecture and platform-specific features, such as code patching or static calls, there is an opportunity to speed up these routines for certain platforms. The goal of this discussion is to identify the routines that...

151. RISC-V ftrace: working with preemption

Tao Chiu

9/13/22, 6:00 PM

We found several issues linked inherently with ISA of RISC-V itself when using ftrace after turning on kernel preemption. In RISC-V, we must use 2 instructions to perform a jump to a target which is further than 4KB, and we cannot promise any 2 instructions being executed on the same process context if preemption is enabled. However, this is how we patch code in ftrace in current...