Sep 12 – 14, 2022
Europe/Dublin timezone

The Odyssey of HWCAP on RISC-V platforms

Sep 13, 2022, 3:05 PM
"Meeting 1&2" (Clayton Hotel on Burlington Road)

"Meeting 1&2"

Clayton Hotel on Burlington Road



"Ruinland" ChuanTzu Tsai (SiFive)


It's always been challenging for operating systems to tell the (userspace) programs about the underlying hardware capabilities on RISC-V platforms.

For most computer architectures, a bit vector may suffice since the 64 bit platforms are most likely the enhancement of their 32 bit predecessors.

Yet sadly that's more than complicated for RISC-V, which has a much more diverse ecosystem.

In this talk we would like to discuss a proof of concept on Linux in which we utilize the vDSO data section as the intermediate for showing hardware capabilities - - either directly accessing it via a pointer passed from HWCAP2 or a vdso function call (with an architecture-specific syscall as the fallback).

We will tell the story about the good, the bad and the ugly sides of this approach and we sincerely hope to hear the comments from the community.

I agree to abide by the anti-harassment policy Yes

Primary author

"Ruinland" ChuanTzu Tsai (SiFive)

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