Sep 12 – 14, 2022
Europe/Dublin timezone

CXL Type-3 device discovery, configuration in firmware and prepare ACPI tables for kernel usage

Sep 14, 2022, 3:05 PM
"Herbert" (Clayton Hotel on Burlington Road)


Clayton Hotel on Burlington Road

Compute Express Link MC Compute Express Link MC


Mr Sayanta Pattanayak (ARM Ltd.)


There has been growing need for increasing memory capacity in enterprise design and CXL has emerged as one of the preferred solution to meet this increasing demand. CXL and other relevant specifications have defined various mechanisms, which allow kernel to utilize the extended memory capacity.

In this presentation, an implementation of firmware support for a AArch64 compliant platform will be discussed. Firmware performs enumeration, Type-3 device discovery and identifying its capabilities. In addition to this, using the DOE mechanisms, CDAT structures are fetched and details are passed on through different phases of booting firmware. Host interconnect is configured by the firmware for device memory access according to the device property. Secure firmware performs all these operations and subsequently in non-secure firmware (EDK2), all Type-3 device details are captured in the ACPI tables (SRAT, HMAT, CEDT etc.) for usage by kernel software. Linux drivers parse and utilize ACPI information, for configuring host and device accordingly and uses the extended memory as separate NUMA node. For this discussion, the implementation of the above on the Neoverse N2 reference design FVP will be used as an example.

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Primary author

Mr Sayanta Pattanayak (ARM Ltd.)

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