Compute Express Link (CXL) MC CFP

We are pleased to announce that we will have a CXL MC this year at Plumbers, and hereby invite the community in our call for participation.

Compute Express Link is a cache coherent fabric that in recent years has been gaining momentum in the industry. CXL 3.0 launched just before Plumbers 2022 (where very early discussions took place),  bringing new challenges such as dynamic capacity devices and large scale fabrics, two features that bring significant challenges to Linux. There also has been controversy and confusion in the Linux kernel   community about the state and future of CXL, regarding its usage and integration into, for example, the core memory management subsystem. Many concerns have been put to rest through proper clarification and setting of expectations.

The Compute Express Link microconference focuses on how to evolve the Linux CXL kernel driver and userspace components for support of the CXL 2.0 spec (and beyond). The microconference provides a  pace to open the discussion, incorporate more perspectives, and grow the CXL community with a goal that the CXL Linux plumbing serves the needs of the CXL ecosystem while balancing the needs of the  Linux project. Specifically, this microconference welcomes submissions detailing industry and academia use cases in order to develop usage model scenarios. Finally, it will be a good opportunity to have  existing upstream CXL developers available in a forum to discuss current CXL support and to communicate areas that need additional involvement.

Suggested topics:

  • Ecosystem & Architectural review
  • Dynamic Capacity Devices
  • Fabric Management
  • QEMU support
  • Security (ie: IDE/SPDM)
  • Managing vendor specificity
  • Type 2 accelerator support (bias flip management)
  • Coherence management of type2/3 memory (back-invalidation)
  • Peer2Peer (ie: Unordered IO)
  • Reliability, availability and serviceability (ie: Advanced Error Reporting, Isolation, Maintenance).
  • Hotplug (QoS throttling, policies, daxctl)
  • Hot remove
  • Documentation
  • Memory tiering topics that can relate to cxl (out of scope of MM/performance MCs)
  • Industry and academia use cases

Proposals can be submitted here, by September 1st:

For more information, feel free to contact the Compute Express Link MC Leads:
Davidlohr Bueso <>
Jonathan Cameron <>
Adam Manzanares <>
Dan Williams <>

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