Description
Confidential Computing MC
Over the last few years, the Confidential Computing microconferences at LPC have been a key driver in advancing support for trusted execution workloads across the Linux virtualization and software ecosystem.
As a result of the previous confidential computing microconference, the following major features were merged:
- SEV-SNP support
- TDX support
- TDISP Infrastructure
- SEV-TIO support
- SVSM guest-side support
The microconference at LPC serves as the key in-person event for Linux-related developments, as well as an important platform for standardizing confidential computing features across different platforms.
The open source software stack for confidential computing is still far from being complete. There remain many problems to be solved and functionality to enable. Some of the most important ongoing developments are:
- Enhancements to CVM memory backing via guest_memfd
- KVM Support for ARM CCA
- Privilege separation features in KVM
- CVM live migration.
- Secure VM Service Module architecture and Linux support
- Trusted I/O software architecture
Further topics to discuss are:
- Solutions for the full CVM (remote) attestation problem
- Linux as a CVM operating system across hypervisors
- CVM Performance
The Confidential Computing microconference of 2026 wants to bring open source developers and industry experts together into productive discussions and to collaborate on solutions for the open problems.
Key attendees:
- Ashish Kalra ashish.kalra@amd.com
- Borislav Petkov bp@alien8.de
- Dan Williams dan.j.williams@intel.com
- Daniel P. Berrangรฉ berrange@redhat.com
- David Hansen dhansen@linux.intel.com
- David Kaplan David.Kaplan@amd.com
- David Rientjes rientjes@google.com
- Dhaval Giani dhaval.giani@gmail.com
- Elena Reshetova elena.reshetova@intel.com
- James Bottomley James.Bottomley@HansenPartnership.com
- Joerg Roedel joro@8bytes.org
- Jon Lange jlange@microsoft.com
- Michael Roth michael.roth@amd.com
- Mike Rapoport rppt@kernel.org
- Paolo Bonzini pbonzini@redhat.com
- Peter Fang peter.fang@intel.com
- Peter Gonda pgonda@google.com
- Sean Christopherson seanjc@google.com
- Stefano Garzarella sgarzare@redhat.com
- Tom Lendacky thomas.lendacky@amd.com
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Alexey Kardashevskiy (AMD)
SEV-TIO is quite known by now, the upstream development is split in stages and continues. The current stages are set to support basic functionality.
The talk will focus on extended features and how AMD hardware/firmware is going to implement these. This includes:
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- huge pages handling in IOMMU and KVM, how RMP works and what TMPM does in PSMASH_IO.
- IOMMU TLB flushing challenges: a hack... -
Ruoqing He (LingCage), Mr Xiaoxia Cui (Damo)
RISC-V CoVE (Confidential VM Extension) brings confidential computing โ hardware-enforced isolation of tenant workloads from the hypervisor and cloud operator โ to a fully open architecture.
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A lightweight TEE Security Manager (TSM) sits below the hypervisor and enforces per-VM memory isolation, while tenants verify their environment through a standard IETF RATS attestation flow. The... -
Elena Reshetova (Intel)
Live migration and runtime attestation are two critical features for Confidential Computing to get right, not just in terms of fulfilling customer requirements, but also correct integration into common Linux codebase and overall code simplicity and maintainability. Based on Linux community feedback, TDX architecture went through a few big changes last year wrt to Live Migration and...
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Manali Shukla
PMU Event filtering is a security feature that allows hypervisors to restrict which performance events guests can monitor, preventing potential side-channel attacks. However, when using hardware-acceleration PMU virtualization, the encrypted VMSA in SEV-ES and SEV-SNP creates a fundamental challenge: hypervisors cannot read or modify guest PMU states directly, which breaks PMC filtering with...
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Mathias Brossard (Arm)
Arm is developing Live Migration ABIs for the Arm Confidential Compute Architecture (CCA), with input and requirements from ecosystem partners. The ABIs are provided by the Realm Management Monitor (RMM), the trusted firmware component responsible for managing Realms.
The presentation will start with a short overview of the high-level CCA Live Migration design and the end-to-end process. It...
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Ryan Afranji (Google)
Coco VMs rely on bounce buffering to use the guest's vCPUs to encrypt and decrypt data for DMA. This memory copy is performed via the SWIOTLB bounce buffer.
Persistent disk read operations handle completions within their storage interfaceโs interrupt handler. When SWIOTLB is disabled, the interrupt handler is invoked only after the DMA data transfer is completed. This makes the handler only...
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Ankit Agrawal
We are extending Arm CCA device assignment to CXL Type-2 accelerators so a Realm VM can receive such a device with a coherent device memory window. Standard RME-DA assigns a PCIe TDI to a Realm through TDISP, SPDM and IDE, protecting CXL.io traffic. A CXL Type-2 device also exposes a coherent CXL.mem window through HDM decoders and which confidential assignment must also secure.
RMM v2.0...
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