Speaker
Description
We are extending Arm CCA device assignment to CXL Type-2 accelerators so a Realm VM can receive such a device with a coherent device memory window. Standard RME-DA assigns a PCIe TDI to a Realm through TDISP, SPDM and IDE, protecting CXL.io traffic. A CXL Type-2 device also exposes a coherent CXL.mem window through HDM decoders and which confidential assignment must also secure.
RMM v2.0 introduces a PDEV Stream object as a first-class handle for the device security channel and a COH_CMEM stream type for coherent off-chip accelerators - the right primitives to extend CCA to CXL Type-2. Several design problems remain unsolved: how the host TSM obtains and registers the CXL coherent memory range with RMM, how the guest TSM attests that range, and how to coordinate device probe with stream connect so the coherent range is always registered with RMM regardless of call ordering. This session will work through these open questions to align on a direction for upstream development.