Speaker
Description
AMD’s Smart Data Cache Injection (SDCI) leverages PCIe TLP Processing Hints (TPH) to steer DMA write data directly into the target CPU's L2 cache to reduce latency, improve throughput, and reduce DRAM bandwidth. This talk covers the details of AMD SDCI design, outlines the Linux kernel support we have developed - including a new ACPI _DSM interface in the PCI root complex and extensions to provide TPH API - and demonstrates how driver developers can adopt these features to unlock performance gains. We will present results using two open-source network drivers showing measurable improvements in latency and bandwidth efficiency on AMD SDCI-enabled SoCs, and conclude with lessons learned, practical considerations for driver adoption, and design implications under virtualized environments.