Description
We are excited to propose the next edition of the RISC-V micro conference to be held during the Plumbers Conference in 2024. This event has consistently served as a pivotal gathering for developers, enthusiasts, and stakeholders in the RISC-V ecosystem, especially those focused on its integration and evolution within the Linux environment. Broadly speaking anything related to both Linux and RISC-V is on topic, but discussion tend to involve the following categories:
- How to support new RISC-V ISA features in Linux mainly vendor-specific extensions.
- Discussions related to RISC-V based SOCs, which frequently include interactions with other Linux subsystems as well as core arch/riscv code.
- Coordination with distributions and toolchains on userspace-visible behavior.
Possible Topics
The actual list of topics tends to be hard to pin down this early, but here's a few topics that have been floating around the mailing lists and may be easier to resolve real-time:
- Unified discovery - What to do with this ? RVI spec which has little use in kernel land
- Control-flow integrity on RISC-V kernel.
- Hardware breakpoints / watchpoints
- OPTEE preemption model (interrupt delivery)
- riscv64 text patching w/o stop_machine()
- RISCV kernel control flow integrity
- non-PCI MSI capable devices in ACPI
- Napot
- BULTIN_DTB
Key Stakeholders
Apologies if I've missed anyone, but I've tried to list a handful of the people who frequently show up and help drive discussions at the RISC-V microconferences we've held at past Plumbers:
Regular RISC-V contributors/maintainers (I probably forgot few more)
- Palmer Atish Anup Conor Sunil Bjorn Alex Clement Andrew
- Soc stakeholders (Arnd, Conor, Heiko, Emil: There are many new SOC families showing up with RISC-V ports, and much of the new)
- We usually have attendance from a handful of the arm/arm64/ppc/mips/loongarch contributors/maintainers, as we share a lot of code and thus find many cross-arch issues. There's probably going to be even more now that we've got many shared SOC families.
- Carlos/Nick: Due to the nature of RISC-V we end up with many complicated toolchain interactions, so it's always good to have some time to discuss toolchain topics.
Accomplishments post 2023 Microconference
- All the talks at the 2023 Plumbers microconference have made at least some progress, with many of them resulting in big chunks of merged code. Specifically:
- Futile attempt to deprecate nommu after agreement in RISC-V MC :) [1]
- In fact, More support for nommu landed as a result of that discussion :[2]
- Perf feature improvement patches under discussion in lore [3]
- Good progress on supervisor software events [4] and more use cases (CFI, double trap)
- Kernel mode vector support merged[5]
[1] https://lore.kernel.org/lkml/a49546e8-6749-4458-98da-67fd37b7df18@rivosinc.com/
[2] https://lore.kernel.org/lkml/20240325164021.3229-1-jszhang@kernel.org/
[3] https://lore.kernel.org/lkml/20240217005738.3744121-1-atishp@rivosinc.com/
[4] https://lore.kernel.org/lkml/20240112111720.2975069-1-cleger@rivosinc.com/
[5] https://lore.kernel.org/all/20240115055929.4736-3-andy.chiu@sifive.com/t/#m1d48afa31c6040e4433cbf3bae2de998ae2ca112
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ATISH PATRA (Rivos), Palmer Dabbelt (Google)19/09/2024, 15:00
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19/09/2024, 15:05
Unified discovery is bad and should stay out of the kernel. I'm just going to have a single slide saying that.
Go to contribution page -
19/09/2024, 15:30
RISC-V Linux goes out of its way to consider overlapping-ISA heterogeneous multiprocessing when managing extensions. Let's review and discuss the current extension support to ensure there aren't gaps nor unnecessary burdens.
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19/09/2024, 16:00
The upcoming series of ftrace code patching reduces the reach of each patch-site to a +/- 2KB range. This might be the unavoidable option we must take, as we move on to wave
Go to contribution pagestop_machine()away, support preemption, and maintain an acceptable code size. Thus, we are going to focus our discussions on what options are there for us to support direct calls and various ftrace optimizations.... -
19/09/2024, 17:00
RISC-V IO Mapping Table (RIMT) is RISC-V specific ACPI table for providing the IOMMU information to the OS. This specification is currently in draft state and we have done PoC with qemu and linux. We would like to discuss linux changes required, the challenges and proposed solutions. The discussion would help greatly to freeze the specification.
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19/09/2024, 17:30
APLIC is optional in RISC-V. ACPI doesn't have any mechanism to directly support MSIs or GSI to MSI mapping without an wired IRQ to MSI bridge. This proposal takes an attempt to solve that problem.
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19/09/2024, 18:00
We have a had discussions on enabling control flow integrity on riscv for user mode in past. Most of the discussions on that front have settled. In this talk we will do quick recap of user mode cfi support status and considerations with respect to vDSO management and focus on single label scheme. We will be discussing CPU assisted kernel control flow integrity for risc-v kernel as well. We...
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