Linux Plumbers Conference 2020

Session

VFIO/IOMMU/PCI MC

Aug 26, 2020, 7:00 AM

Presentation materials

public-chat-VFIO-IOMMU-PCI-LPC2020-Aug26.txt

154. Criteria of using VFIO mdev (vs. userspace DMA)

Ashok Raj

8/26/20, 7:00 AM

VFIO mdev provides a framework for subdevice assignment and reuses existing VFIO uAPI to handle common passthrough-related requirements. However, subdevice (e.g. ADI defined in Intel Scalable IOV) might not be a PCI endpoint (e.g. just a work queue), thus requires some degree of emulation/mediation in kernel to fit into VFIO device API. Then there is a concern on putting emulation in kernel...

243. Enhancements to IOMMU and VFIO User APIs for guest SVA

Jacob Pan, Mr Yi Liu

8/26/20, 7:20 AM

IOMMU UAPIs was partially merged to support basic guest Shared Virtual Address (SVA) functionalities such as cache invalidation, bind guest page tables, and page request service. These initial patches defined UAPI data structures without the transport mechanics and specifics for future extensions.
To bridge these gaps, new patchsets are being developed by Yi L Liu and Jacob Pan to address the...

244. IOASID API extensions for Intel Scalable IOV usages

Yi Liu, Jacob Pan

8/26/20, 7:40 AM

As it currently stands in the mainline kernel, IOASID is a generic kernel service that provides PCIe PASID or ARM SMMU sub-stream ID allocations. On VT-d and Intel's Scalable IO Virtualization(SIOV) platforms, IOASID core serves a particularly important role as its usage spans the following dimensions:
- bare metal and guest SVM
- A slew of in-kernel users consists of VFIO, IOMMU, mm, VDCM*,...

260. Untrusted/External devices management

Mr Rajat Jain (Google)

8/26/20, 8:15 AM

Location v/s Trust

• Currently firmware can mark ports as external-facing (and thus indicates any devices downstream that port are external). PCI & IOMMU subsystem treats external devices as untrusted (ATS is not allowed, sets up bounce buffers, and uses "strict" iommu).

• We should separate "Location" from "Trust". (Not all internal devices may be trustworthy).

• Location of a...

138. PCI hotplug: movable BARs and bus numbers

Sergei Miroshnichenko (Yadro)

8/26/20, 8:40 AM

Hot-adding a PCI device requires gaps in the address space for new BARs, and extra bus numbers if this is a bridge. Usually these resources are reserved not by the kernel, but by BIOS, bootloader, firmware.

If a bridge have windows not big enough (or fragmented too much) for newly requested BARs, it is still may be possible to allocate a memory region for new BARs, if at least some working...

245. AER handling for RCEC

Mr Sean Kelley (Intel Corp.)

8/26/20, 9:15 AM

The Linux kernel has lacked support for RCEC AER handling until now. Several patches have been submitted to address this gap. The purpose of this discussion is to ensure various cases for use of RCEC in native and non-native modes (sometimes referred to as firmware-first) are addressed.

https://lore.kernel.org/linux-pci/20200812164659.1118946-1-sean.v.kelley@intel.com/

250. Allowing device drivers to enable PCI capabilities vs IOMMU

Ashok Raj, Baolu Lu

8/26/20, 9:35 AM

Current implementation allows IOMMU to automatically enable certain PCI features that require IOMMU co-ordination. For various reasons to ensure ordering etc. But new use cases such as Scalable IOV, and also a way to quirk behavior due to bugs could be managed on the device vs adding a certain quirk table and such. Provides more control to support new requirements from modern devices such as...

251. dma-iommu conversion work for the Intel VT-d driver

Thomas Murphy

8/26/20, 10:05 AM

We can remove a lot of duplicated code from the Intel IOMMU driver by using the generic dma-iommu path for IO virtual address handling.

We have two main issues preventing us from merging this work. The intel i915 gpu driver doesn't handle scatter gather lists correctly and we need to work on a generic copy of the Intel IOMMU driver's bounce buffer code for untrusted devices.

This micro...

252. Passthrough of VMD subdevices

Jonathan Derrick

8/26/20, 10:25 AM

The Intel Volume Management Device (VMD) behaves similar to a PCI-to-PCI bridge that changes the subdevice's requester ID to VMD's. VMD also remaps subdevice MSI/X into its own MSI/X mapping table. Because of the requester ID factor, the VMD device and subdevice domain fall under a single IOMMU group.

VMD is being integrated more and more into Intel chipsets and the desire to assign...

110. Virtio based communication between RC<->EP and between HOSTS connected to NTB

Mr Kishon Vijay Abraham I

8/26/20, 10:40 AM

Existing Linux endpoint only supports pci-epf-test for communication between RootComplex and EndPoint systems (Both running Linux). While pci-epf-test is good enough for "testing" communication between RootComplex and Endpoint, additional development based on pci-epf-test was required for implementing any real use-cases.

This paper proposes to use existing Virtio infrastructure in Kernel...