Speakers
Description
The PCIe Unordered I/O (UIO) feature (introduced in v6.1) relaxes the strict ordering rules of the PCIe fabric, providing benefits such as the avoidance of head-of-line (HOL) blocking. CXL v3.2 specification incorporates P2P UIO access into the HDM space, enabling the peer access from non-CXL capable accelerators (e.g., GPUs) over the PCIe bus.
Enabling UIO in the Linux kernel involves certain considerations:
- Coherency management while allowing CXL HDM space for both normal and P2P accesses (Ex: coupling with back-invalidation).
- Managing a UIO capable P2P route between a provider (e.g., CXL HDM) and requester (e.g, PCIe GPU).
This session will discuss:
- Enumeration of UIO within the PCI and CXL layers.
- CXL-side aspects of a P2P UIO capable memory region (including HDM-DB).
- PCI driver design for UIO and associated P2P-DMA considerations.
- Potential race conditions during enumeration and the mapping P2P routes.