Speakers
Description
LPC 2026: RISC-V Microconference
The RISC-V ecosystem continues to expand rapidly, with new silicon like the RVA23-compatible SpacemiT K3, a steady cadence of ratified and vendor-defined ISA extensions, and platform classes reaching from embedded parts to server-class SoCs. Session topics cover architecture work, platform and vendor enablement, firmware/SBI coordination, and userspace behavior, with the aim of arriving at concrete next steps that participants can act on after the conference.
Accomplishments since LPC 2025
Results and follow-ups from the 2025 microconference and the broader ecosystem since December 2025:
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Control Flow Integrity (CFI): user-mode CFI support, Zicfilp (forward-edge landing pads) and Zicfiss (shadow stack), was merged for v7.0 window
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ACPI enablement: System MSI and RIMT (RISC-V IO Mapping Table) support landed; additional tables and platform features are being wired up. A new RQSC (Quality of Service Controller) table is under review.
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RVA23 profile: preparatory work in the kernel for safely enabling RVA23-assuming code paths has continued following Charlie Jenkins's 2025 talk.
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Control Transfer Records (CTR): kernel and QEMU support is maturing.
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SBI / firmware messaging: the Message Proxy (MPXY) mailbox driver and related SBI extensions for firmware-mediated device access have been merged / refined.
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Platform enablement: expanded SoC peripheral support (SpacemiT, Eswin, etc.), and progress toward generic distro boot on RISC-V.
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QoS: the Ssqosid + CBQRI + RQSC resctrl series has significantly matured following the 2025 talk.
Proposed topics for 2026
Topics are targeted at ~15-30 minutes. Each session should only have a couple of slides to inform and stimulate discussion among the people attending the session.
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RVA23 in practice - what it means once distros begin assuming it, remaining gaps in discovery, compatibility fallbacks for older hardware, and testing strategy.
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Vendor-specific extensions - strategy for merging and enabling vendor extensions without fragmenting
arch/riscv. -
Kernel CFI: next steps - forward-edge kernel CFI, indirect branch tracking, etc
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ACPI on RISC-V - what is still missing for ACPI-first platforms (power, thermal, PCIe quirks, etc)?
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RISC-V QoS and resctrl - Ssqosid + CBQRI + RQSC series status, resctrl integration, open review items, and how this plugs into the cross-architecture resctrl rework.
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SBI firmware messaging (MPXY and beyond) - when MPXY-style firmware mediation is the right answer, how it interacts with mailbox/RPMsg, and the bindings/API stability story.
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IOMMU / RIMT and DMA - RISC-V IOMMU driver maturity, ATS/PRI, SVA on RISC-V, nested translation, DMA coherence and CMO.
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KVM / hypervisor topics - Smrnmi handling, nested virt, Supervisor Software Events (SSE), H-extension adoption across silicon.
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Vector - Vector usage in kernel like crypto and memcpy; should kernel try to support SoC where some cores have longer vector length than others like K3?
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Pre-silicon upstream methodology — continuing from Yuning Liang's 2025 talk: what worked, what didn't, and a shared checklist for bring-up in simulation/emulation environments.
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Debug and crash tooling - kdump and crash follow-ups to Austin Kim's 2025 talk; kgdb, perf, and on-target debug
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RV32 and small cores - follow-up to the "schism" discussion at LPC 2025; what is the sustainable plan for RV32 in-tree?
Key participants
As in 2025, the microconference draws organizers, maintainers, and contributors from across the RISC-V Linux community. Expected key participants: Paul Walmsley, Anup Patel, Conor Dooley, Andrew Jones, Deepak Gupta, Charlie Jenkins, Sunil V L, Samuel Holland, Radim Krcmar, Guo Ren, Inochi Amaoto, Yixun Lan, Ruinland, Austin Kim, Yuning Liang, Andy Chiu, Mikey Neuling, Andy Gross, Joel Stanley, Michael Ellerman, Anirudh Srinivasan, Drew Fustini