Nov 13 – 15, 2018
America/Vancouver timezone

RISC-V hypervisor Spec - The Good, the Bad and the Ugly

Nov 15, 2018, 11:30 AM
Pavillion/Ballroom-D (Sheraton Vancouver Wall Center)


Sheraton Vancouver Wall Center



Alistair Francis (Western Digital)


The RISC-V ISA is still missing a key aspect in modern computing by not having virtualization support. The spec is currently in draft state, although most of the key elements are there. We can discuss what the next steps are in order to start getting hypervisors running, at least in QEMU. We can also discuss having the spec ratified and included in the official RISC-V ISA.

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